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Verification register Frontier Hardware & Quantum

Readiness verdict

Sparxity JUBIS sparse-native computing system at Jülich

A dated reading of what is claimed, reported, and independently verified in the current evidence.

As of
2026-10-29
Revision
1
Method
v1.3.0

Current reading

Readiness band and full integer triple

AI-assisted assembly · derived results

Readiness band

Watch

Primary summary from verified readiness

Confidence
84% · fresh
Computed at
2026-10-29T16:46:07.985332+00:00
Claimed
50

Public ambition and stated capability

Reported
50

Observed practitioner reporting

Verified
50

Independently supported evidence

Gap
0

Claimed and verified align

Evidence strength Strong

Decision

What the current evidence supports

Human editorial judgment · 2026-10-29

Wait for stronger evidence

Why
JUBIS is a real, installed 2-rack system (90 boards, 4,320 SpiNNaker2 chips, 656,640 Arm cores per Jülich) funded by EFRE/NRW, and the vendor reports 3 tape-outs, 70,000+ chips and 30+ customers. But the 10x/18x/20x numbers are unaudited, no baseline is named, outside access is undefined, and the ESAB project is still at benchmarking and prototyping stage. It is a credible research-grade sparse HPC platform, not yet evidence of production advantage.
Next
Watch for ESAB benchmark publications with named baselines, a JSC access/allocation process for JUBIS, and SpiNNext availability with independent energy measurements.

Constraints

Blockers

No named blocker is present in the current public projection.

Evidence summary

Derived counts

AI-assisted assembly

Total
7
Tier 1
2
Tier 2
4
Tier 3
1
Supports
2
Contradicts
0
Context
5
Latest observed
2026-10-28

Counts and dates only. Raw signals, private excerpts, trust records, and internal corpus material are not published here.

Publication record

Revisions

Initial public reading

  1. 2026-10-29 Initial recorded band: watch.

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