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Verification register Frontier Hardware & Quantum

Readiness verdict

Imec SiMOS Qubits Fabricated with EUV-Defined Nanowires

A dated reading of what is claimed, reported, and independently verified in the current evidence.

As of
2026-08-05
Revision
1
Method
v1.3.0

Current reading

Readiness band and full integer triple

AI-assisted assembly · derived results

Readiness band

Emerging

Primary summary from verified readiness

Confidence
70% · fresh
Computed at
2026-08-05T18:20:24.33928+00:00
Claimed
30

Public ambition and stated capability

Reported
30

Observed practitioner reporting

Verified
30

Independently supported evidence

Gap
0

Claimed and verified align

Evidence strength Strong

Decision

What the current evidence supports

Human editorial judgment · 2026-08-05

Track; not yet

Why
Genuine, primary-sourced (peer-reviewable arXiv preprint, GST-characterized) fabrication-uniformity advance for silicon spin qubits — first EUV-lithography SiMOS qubits with 100% room-temp gate-to-gate leakage yield on a 300mm pilot line — but demonstrated on only 4 double-dot systems with no production timeline; not yet an infrastructure PV depends on, worth tracking as a quantum-hardware maturity signal.
Next
Re-check at imec/Diraq's next publication or conference disclosure (IEDM, VLSI Symposium, or an arXiv v2/follow-up) for qubit-array counts beyond 4 double-dot systems and any stated TRL or foundry-partner roadmap for EUV-fabricated spin-qubit production.

Constraints

Blockers

No named blocker is present in the current public projection.

Evidence summary

Derived counts

AI-assisted assembly

Total
5
Tier 1
0
Tier 2
2
Tier 3
3
Supports
2
Contradicts
0
Context
3
Latest observed
2026-08-04

Counts and dates only. Raw signals, private excerpts, trust records, and internal corpus material are not published here.

Publication record

Revisions

Initial public reading

  1. 2026-08-05 Reading moved from emerging to emerging.

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