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Verification register Security & Identity

Readiness verdict

Intel TDX Connect

A dated reading of what is claimed, reported, and independently verified in the current evidence.

As of
2026-08-20
Revision
1
Method
v1.3.0

Current reading

Readiness band and full integer triple

AI-assisted assembly · derived results

Readiness band

Emerging

Primary summary from verified readiness

Confidence
68% · stale
Computed at
2026-08-20T10:51:25.729389+00:00
Claimed
55

Public ambition and stated capability

Reported
34

Observed practitioner reporting

Verified
19

Independently supported evidence

Gap
+36

Claimed leads verified

Evidence strength Strong

Decision

What the current evidence supports

Human editorial judgment · 2026-08-20

Track; not yet

Why
The standards-based architecture is sound and Xeon 6 silicon ships, but the full stack (host OS, hypervisor, device firmware, kernel attestation) is pre-GA; only base Intel TDX (CPU-only) CVMs are GA today, and the GPU pairing is shipping on the AMD path, not Intel's.
Next
Track the GA Azure confidential-GPU path (AMD SEV-SNP + NVIDIA H100, NCC H100 v5) as the practical on-ramp for confidential AI today; revisit Intel TDX Connect when device attestation lands in mainline Linux past Phase 1 and a GA cloud SKU pairing Intel TDX with an attested GPU appears (target 2026).

Constraints

Blockers

No named blocker is present in the current public projection.

Evidence summary

Derived counts

AI-assisted assembly

Total
9
Tier 1
2
Tier 2
3
Tier 3
4
Supports
0
Contradicts
4
Context
5
Latest observed
2026-06-24

Counts and dates only. Raw signals, private excerpts, trust records, and internal corpus material are not published here.

Publication record

Revisions

Initial public reading

  1. 2026-07-19 Reading moved from emerging to emerging.

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