Verification register Security & Identity
Current reading
Readiness band and full integer triple
AI-assisted assembly · derived results
Readiness band
Watch
Primary summary from verified readiness
- Confidence
- 70% · stale
- Computed at
- 2026-09-22T23:27:14.984527+00:00
- Claimed
- 50
- Reported
- 45
- Verified
- 39
- Gap
- +11
Public ambition and stated capability
Observed practitioner reporting
Independently supported evidence
Claimed leads verified
Evidence strength Growing
Decision
What the current evidence supports
Human editorial judgment · 2026-09-22
Wait for stronger evidence
- Why
- The spec is solid and standards-aligned and Turin silicon ships, but the only verifiable enablement is IDE-only Phase 1 in the kernel — the device-binding, secure-DMA and attestation that make SEV-TIO useful for confidential AI are still future phases.
- Next
- Monitor the PCI/TSM kernel series past Phase 1 (TDISP + attestation phases) and wait for a cloud provider to offer attested SEV-TIO device binding; until then rely on plain SEV-SNP CVMs (3-15% measured overhead) for CPU-only confidentiality.
Constraints
Blockers
No named blocker is present in the current public projection.
Evidence summary
Derived counts
AI-assisted assembly
- Total
- 6
- Tier 1
- 2
- Tier 2
- 3
- Tier 3
- 1
- Supports
- 2
- Contradicts
- 2
- Context
- 2
- Latest observed
- 2025-12-06
Counts and dates only. Raw signals, private excerpts, trust records, and internal corpus material are not published here.
Publication record
Revisions
Revision 2
- 2026-07-19 Reading moved from watch to watch.
- 2026-09-22 Reading moved from watch to watch.